Functionally partitioned module-based programmable architecture for wireless base-band processing

Leung, Simon and Postula, Adam (2003) Functionally partitioned module-based programmable architecture for wireless base-band processing. Journal of Systems Architecture, 49 4-6: 177-192. doi:10.1016/S1383-7621(03)00072-9

Author Leung, Simon
Postula, Adam
Title Functionally partitioned module-based programmable architecture for wireless base-band processing
Journal name Journal of Systems Architecture   Check publisher's open access policy
ISSN 1383-7621
Publication date 2003-09-01
Sub-type Article (original research)
DOI 10.1016/S1383-7621(03)00072-9
Open Access Status
Volume 49
Issue 4-6
Start page 177
End page 192
Total pages 16
Editor K. Kuchcinski
N. Scarabottolo
Place of publication The Netherlands
Publisher Elsevier
Language eng
Subject C1
291708 Baseband Technology
700302 Telecommunications
Abstract A specialised reconfigurable architecture is targeted at wireless base-band processing. It is built to cater for multiple wireless standards. It has lower power consumption than the processor-based solution. It can be scaled to run in parallel for processing multiple channels. Test resources are embedded on the architecture and testing strategies are included. This architecture is functionally partitioned according to the common operations found in wireless standards, such as CRC error correction, convolution and interleaving. These modules are linked via Virtual Wire Hardware modules and route-through switch matrices. Data can be processed in any order through this interconnect structure. Virtual Wire ensures the same flexibility as normal interconnects, but the area occupied and the number of switches needed is reduced. The testing algorithm scans all possible paths within the interconnection network exhaustively and searches for faults in the processing modules. The testing algorithm starts by scanning the externally addressable memory space and testing the master controller. The controller then tests every switch in the route-through switch matrix by making loops from the shared memory to each of the switches. The local switch matrix is also tested in the same way. Next the local memory is scanned. Finally, pre-defined test vectors are loaded into local memory to check the processing modules. This paper compares various base-band processing solutions. It describes the proposed platform and its implementation. It outlines the test resources and algorithm. It concludes with the mapping of Bluetooth and GSM base-band onto the platform.
Keyword Computer Science, Hardware & Architecture
Q-Index Code C1

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Created: Wed, 15 Aug 2007, 12:06:31 EST