Evaluation and modelling of MOSFET degradation due to electrical stressing through gate-to-source and gate-to-drain capacitance measurement

Yeow Y.T., Ling C.H. and AH L.K. (1991). Evaluation and modelling of MOSFET degradation due to electrical stressing through gate-to-source and gate-to-drain capacitance measurement. In: Tenth Microelectronic Conference, Melbourne, Aust, (77-80). June 24, 1991-June 25, 1991.

Author Yeow Y.T.
Ling C.H.
AH L.K.
Title of paper Evaluation and modelling of MOSFET degradation due to electrical stressing through gate-to-source and gate-to-drain capacitance measurement
Conference name Tenth Microelectronic Conference
Conference location Melbourne, Aust
Conference dates June 24, 1991-June 25, 1991
Journal name National Conference Publication - Institution of Engineers, Australia   Check publisher's open access policy
Series National Conference Publication - Institution of Engineers, Australia
Publisher Publ by IE Aust
Publication Year 1991
Sub-type Fully published paper
ISSN 0313-6922
Issue 91 pt 5
Start page 77
End page 80
Total pages 4
Subjects 2200 Engineering
Q-Index Code E1
Q-Index Status Provisional Code
Institutional Status Unknown

Document type: Conference Paper
Collection: Scopus Import - Archived
 
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Created: Tue, 16 Aug 2016, 13:27:48 EST by System User