Transient analysis of bang-bang phase locked loops

Chan, M. and Postula, A. (2009) Transient analysis of bang-bang phase locked loops. IET Circuits, Devices and Systems, 3 2: 76-82. doi:10.1049/iet-cds.2008.0119


Author Chan, M.
Postula, A.
Title Transient analysis of bang-bang phase locked loops
Journal name IET Circuits, Devices and Systems   Check publisher's open access policy
ISSN 1751-858X
1751-8598
Publication date 2009-04-01
Sub-type Article (original research)
DOI 10.1049/iet-cds.2008.0119
Open Access Status
Volume 3
Issue 2
Start page 76
End page 82
Total pages 7
Place of publication Stevenage, Herts, United Kingdom
Publisher The Institution of Engineering and Technology
Language eng
Subject 2207 Control and Systems Engineering
2208 Electrical and Electronic Engineering
Abstract This work gives insight into the behaviour of second-order bang-bang phase locked loops in the far from lock region. This region, while largely unexplored, is of particular interest as PLL behaviour in this region determines locking time and capture range. By analysing PLL cycle slipping behaviour in this region, the transient response for the system is derived. Expressions for first-order system stability and locking time are also presented.
Q-Index Code C1
Q-Index Status Provisional Code
Institutional Status UQ

Document type: Journal Article
Sub-type: Article (original research)
Collection: School of Information Technology and Electrical Engineering Publications
 
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Citation counts: TR Web of Science Citation Count  Cited 5 times in Thomson Reuters Web of Science Article | Citations
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Created: Thu, 03 Sep 2009, 18:13:50 EST by Mr Andrew Martlew on behalf of School of Information Technol and Elec Engineering