Reconfigurable VLSI implementations of bit-serial systolic arrays for real-time digital signal processing

Wong, Homer (1996). Reconfigurable VLSI implementations of bit-serial systolic arrays for real-time digital signal processing PhD Thesis, School of Computer Science and Electrical Engineering, The University of Queensland.

       
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Author Wong, Homer
Thesis Title Reconfigurable VLSI implementations of bit-serial systolic arrays for real-time digital signal processing
School, Centre or Institute School of Computer Science and Electrical Engineering
Institution The University of Queensland
Publication date 1996
Thesis type PhD Thesis
Total pages 176
Collection year 1996
Language eng
Keyword Signal processing - Digital techniques
Integrated circuits - Very large scale integration
Systolic array circuits
Additional Notes Reconfigurable VSLI bit-serial systolic arrays for DSP

Document type: Thesis
Collection: UQ Theses (RHD) - UQ staff and students only
 
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Created: Wed, 29 Jul 2015, 15:05:43 EST by Mr Andrew Martlew