A dynamic computation method for fast and accurate performance evaluation of multi-core architectures

Le Nours, Sebastien, Postula, Adam and Bergmann, Neil W. (2014). A dynamic computation method for fast and accurate performance evaluation of multi-core architectures. In: Proceedings - Design, Automation and Test in Europe, DATE 2014. 17th Design, Automation and Test in Europe, DATE 2014, Dresden, Germany, (1483-1488). 24 - 28 March 2014. doi:10.7873/DATE2014.302

Attached Files (Some files may be inaccessible until you login with your UQ eSpace credentials)
Name Description MIMEType Size Downloads
UQ331233_OA.pdf Full text (open access) application/pdf 353.37KB 0

Author Le Nours, Sebastien
Postula, Adam
Bergmann, Neil W.
Title of paper A dynamic computation method for fast and accurate performance evaluation of multi-core architectures
Conference name 17th Design, Automation and Test in Europe, DATE 2014
Conference location Dresden, Germany
Conference dates 24 - 28 March 2014
Convener Gerhard Fettweis
Proceedings title Proceedings - Design, Automation and Test in Europe, DATE 2014
Journal name Design, Automation, and Test in Europe Conference and Exhibition. Proceedings
Series Design, Automation, and Test in Europe Conference and Exhibition. Proceedings
Place of Publication Washington, DC United States
Publisher Institute of Electrical and Electronics Engineers Inc.
Publication Year 2014
Year available 2014
Sub-type Fully published paper
DOI 10.7873/DATE2014.302
Open Access Status File (Author Post-print)
ISBN 9781479932979
9783981537024
ISSN 1530-1591
1558-1101
Start page 1483
End page 1488
Total pages 6
Collection year 2015
Language eng
Abstract/Summary Early estimation of performance has become necessary to facilitate design of complex multi-core architectures. Performance evaluation based on extensive simulations is time consuming and needs to be improved to allow exploration of different architectures in acceptable time. In this paper, we propose a method that improves the tradeoff between simulation speed and accuracy in performance models of architectures. This method computes during model execution some of the synchronization instants involved in architecture evolution. It allows grouping and abstracting architecture processes and this way significantly reduces the number of simulation events. Experiments show significant benefits from the computation method on the simulation time. Especially, a simulation speed-up by a factor of 4 is achieved in the considered case study, with no loss of accuracy about estimation of processing resource usage. The proposed method has potential to support automatic generation of efficient architecture models.
Q-Index Code E1
Q-Index Status Confirmed Code
Institutional Status UQ

 
Versions
Version Filter Type
Citation counts: TR Web of Science Citation Count  Cited 0 times in Thomson Reuters Web of Science Article
Scopus Citation Count Cited 0 times in Scopus Article
Google Scholar Search Google Scholar
Created: Tue, 27 May 2014, 02:44:27 EST by System User on behalf of School of Information Technol and Elec Engineering