As the feature sizes of MOS technologies are scaled to smaller and smaller dimensions, considerable challenges arise in the area of device design. Recent literatures have proved that the silicon-on-insulator (SOI) technology can provide additional leverage in terms of performance and scalability for the mainstream digital applications.
Silicon-on-insulator (SOI) MOSFETs are well known for their advantages over silicon bulk MOSFETs. SOI demonstrates significant improvements, which are fundamentally derived from the capability of total electrical isolation of silicon areas and from the qualitative reduction of junction areas.
This thesis presents the detailed characterization and analysis of the SOI device. The fabrication technologies of the SOI structure are reviewed in terms of material synthesis, processing variants, advantages and drawbacks. Among the SOI technologies, SIMOX is considered to be the most advanced and promising for high-density CMOS circuits.
In order to develop a better understanding of the SOI device, numerical simulations using TMA MEDICI, have been used to investigate the I-V characteristics, potential distributions and the C-V characteristics of a SOI NMOSFET.