In VLSI technology, higher-order Sigma-Delta modulators provide an effective means of high-resolution A/D conversion for signals of low to medium bandwidths. Due to the growing trend in technology and voltage scaling in VLSI technologies, analog cells soon become the bottleneck of high-performance Sigma-Delta modulators. One of the most important analog building blocks within the Sigma-Delta modulator is the operational amplifier. Reduction in supply voltage typically results in more complex circuit design solutions, hence increasing the power dissipation and die area.
In this thesis, a systematic design approach was taken to realise a low-voltage low-power operational amplifier, suitable for use in a 16-bit resolution Sigma-Delta modulator. After a comparison of several amplifier topologies for their suitability for low-voltage operation, a two-stage Class A/AB topology was selected. A set of design specifications for the amplifier was subsequently derived after considering the impact of low-voltage and circuit non-idealities on the performance of the amplifier and hence that of the modulator. Based on these specifications and the first-order equations, which relates various key parameters of the amplifier, initial approximations were made on device sizing. Simulations were used to fine tune device sizes, in order to optimise the amplifier’s performance for the best possible trade-offs in the design. An on-chip voltage doubler was implemented using a similar design approach, to avoid the problem of high switch resistance in low supply voltage circuits.
Simulation results indicated that the DC gain of the designed amplifier is in excess of 69dB and the unity-gain bandwidth is 17.7MHz with phase margin of 72°. The input-referred noise voltage is 7.76nVrms/(Hz)1/2 within the signal bandwidth. When operated from a 1.8V supply voltage, the power dissipation of the core amplifier is approximately 0.66mW. Layout of the amplifier has been done to integrate the design into a 1.2mm CMOS technology and is currently queued for fabrication at MOSIS.