A low power neural recording amplifier with programmable gain and bandwidth

Thanigaivelan, Balavelan, Wiles, Janet and Hamilton, Tara Julia (2012). A low power neural recording amplifier with programmable gain and bandwidth. In: 2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012: Proceedings. 2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012, Seoul, Korea, (2219-2222). 20 - 23 May 2012. doi:10.1109/ISCAS.2012.6271732

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Author Thanigaivelan, Balavelan
Wiles, Janet
Hamilton, Tara Julia
Title of paper A low power neural recording amplifier with programmable gain and bandwidth
Conference name 2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012
Conference location Seoul, Korea
Conference dates 20 - 23 May 2012
Proceedings title 2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012: Proceedings   Check publisher's open access policy
Journal name 2012 Ieee International Symposium On Circuits and Systems (Iscas 2012)   Check publisher's open access policy
Place of Publication Piscataway, NJ, United States
Publisher IEEE
Publication Year 2012
Sub-type Fully published paper
DOI 10.1109/ISCAS.2012.6271732
ISBN 9781467302197
ISSN 0271-4302
Start page 2219
End page 2222
Total pages 4
Collection year 2013
Language eng
Abstract/Summary In this paper we present the design and implementation of a low power neural amplifier which has two programmable gains in two programmable bandwidths. The bandwidths are programmable between 0.7-300Hz, suitable for measuring local field potentials and 1.95-5.4kHz, suitable for measuring action potentials. The amplifier achieves a maximum gain of 79dB in the higher bandwidth. A chip has been designed and implemented using a 0.5μm technology with 8 neural amplifiers. On average the neural amplifier consumes less than 14μW at 3.3V.
Q-Index Code E1
Q-Index Status Confirmed Code
Institutional Status UQ

 
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Created: Thu, 04 Apr 2013, 16:24:24 EST by Ms Deborah Brian on behalf of School of Information Technol and Elec Engineering