A Bayesian Belief Network Approach to Codesign

Amelia Azman (2011). A Bayesian Belief Network Approach to Codesign PhD Thesis, School of Information Technol and Elec Engineering, The University of Queensland.

Attached Files (Some files may be inaccessible until you login with your UQ eSpace credentials)
Name Description MIMEType Size Downloads
s4115749_PhD_Abstract.pdf Abstract application/pdf 12.22KB 13
s4115749_PhD_finalthesis.pdf Final Thesis application/pdf 1.84MB 70
s4115749_Thesis_submission.pdf Thesis Submission Form application/pdf 179.98KB 18
Author Amelia Azman
Thesis Title A Bayesian Belief Network Approach to Codesign
School, Centre or Institute School of Information Technol and Elec Engineering
Institution The University of Queensland
Publication date 2011-10
Thesis type PhD Thesis
Supervisor Prof Brian C lovell
Dr Abbas Bigdeli
Total pages 190
Total black and white pages 190
Subjects 08 Information and Computing Sciences
Abstract/Summary In the early 21st century, more researchers are exploring the knowledge-based technique in solving the hardware/software partitioning process replacing the common heuristic approach. By utilising the knowledge-based approach, this could help to reduce the search space in finding a feasible partitioning solution. Meanwhile, in another research field, the Bayesian Network analysis has been attracting attention for various applications. One of the latest trends is to use the Bayesian Network to solve the partitioning problem. In this thesis, we present our novel algorithm that combines the Bayesian Network with the Constraint Satisfaction Problem (CSP) to perform the partitioning and scheduling process. Our methodology supports a multi-processor embedded system. This thesis also presents our new equation to represent the linking knowledge between nodes to improve the Bayesian Network analysis evaluation process. A new metric to represent the propagation information has also been introduced in this thesis. This research work is part of a larger reconfigurable smart camera project. Hence, our targeted platform is FPGAs. Since there is limited logic space on an FPGA and we have the requirement for real-time throughput, we have also included the area and time constraint conditions in our proposed algorithm. In order to demonstrate the efficiency of our algorithm, we have performed several experiments including the use of JPEG encoder as a demonstration of real image processing application on a smart camera system. We then continue to increase the number of nodes in a task-graph using a random task generator, TGFF, to test the efficiency and evaluate the computation time of our algorithm. The results from the experiment indicate that our Bayesian Network-based partitioning and scheduling algorithm can produce promising codesign solutions.
Keyword codesign
Bayesian Network
Reconfigurable architecture

Citation counts: Google Scholar Search Google Scholar
Created: Thu, 27 Oct 2011, 09:33:05 EST by Amelia Azman on behalf of Library - Information Access Service