Compiler Optimization and Ordering Effects on VLIW Code Compression

Montserrat, Ros and Sutton, Peter (2003). Compiler Optimization and Ordering Effects on VLIW Code Compression. In: J. Moreno and P. Murthy, Proceedings for the CASES 2003: International Conference on Compilers, Architecture and Synthesis for Embedded Systems. International Conference on Compilers, Architecture and Synthesis for Embedded Systems, San Jose, CA, USA, (95-103). Oct 30 - Nov 1, 2003.

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Author Montserrat, Ros
Sutton, Peter
Title of paper Compiler Optimization and Ordering Effects on VLIW Code Compression
Conference Paper Type Fully Published Paper
Conference name International Conference on Compilers, Architecture and Synthesis for Embedded Systems    (ERA 2010 Rank A)
Conference location San Jose, CA, USA
Conference dates Oct 30 - Nov 1, 2003
Proceedings title Proceedings for the CASES 2003: International Conference on Compilers, Architecture and Synthesis for Embedded Systems
Editor J. Moreno
P. Murthy
Place published New York
Publisher ACM Press
Publication date 2003
ISBN 1-58113-676-5
Start page 95
End page 103
Total pages 9
Language eng
Abstract/Summary Code size has always been an important issue for all embedded applications as well as larger systems. Code compression techniques have been devised as a way of battling bloated code; however, the impact of VLIW compiler methods and outputs on these compression schemes has not been thoroughly investigated. This paper describes the application of single- and multiple-instruction dictionary methods for code compression to decrease overall code size for the TI TMS320C6xxx DSP family. The compression scheme is applied to benchmarks taken from the Mediabench benchmark suite built with differing compiler optimization parameters. In the single instruction encoding scheme, it was found that compression ratios were not a useful indicator of the best overall code size - the best results (smallest overall code size) were obtained when the compression scheme was applied to size-optimized code. In the multiple instruction encoding scheme, changing parallel instruction order was found to only slightly improve compression in unoptimized code and does not affect the code compression when it is applied to builds already optimized for size.
Subjects 291605 Processor Architectures
280506 Coding and Information Theory
E1
Keyword code compression
VLIW processors
compiler optimisations
esgweb-research-ros
Q-Index Code E1
 
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Created: Thu, 12 Feb 2004, 10:00:00 EST by Montserrat B Ros on behalf of School of Information Technol and Elec Engineering  -  Detailed History