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 Browse by Research Fields, Courses and Disciplines The Research Fields, Courses and Disciplines (Australian Standard Research Classification) is published by the Australian Bureau of Statistics (ABS catalogue number 1297.0) 1998. ABS data is used with permission from the Australian Bureau of Statistics -> 290000 Engineering and Technology -> 290900 Electrical and Electronic Engineering -> 290902 Integrated Circuits :

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Chan, Michael J., Postula, Adam, Ding, Yong and Jozwiak, Lech (2006) A bang-bang PLL employing dynamic gain control for low jitter and fast lock times. Analog Integrated Circuits and Signal Processing, 49 2: 131-140. doi:10.1007/s10470-006-7581-3 560   5 Cited 8 times in Scopus8 0
Chan, M., Postula, A. J., Ding, Y and Jozwiak, L. (2005). A bang-bang PLL employing dynamic gain control for low jitter and fast lock times. In: Andrzej Napieralski, Proceedings of the 12th International Conference Mixed Design of Integrated Circuits and Systems (MIXDES 2005). 12th International Conference Mixed Design of Integrated Circuits and Systems (MIXDES 2005), Krakow, Poland, (23-27). 22-25 June 2005. 400  
Hong, Yang David, Yeow, YewTong, Chim, Wai Kin, Yan, Jian and Wong, Kin Mun (2006) Accurate Modeling of the Effects of Fringing Area Interface Traps on Scanning Capacitance Microscopy Measurement. IEEE Transactions on Electron Devices, 53 3: 499-506. doi:10.1109/TED.2005.864367 417 192 1 Cited 1 times in Scopus1 0
Rajagopalan, K. and Sutton, P. R. (2001). A flexible multiplacation unit for an FPGA logic block. In: D. Skellern and G. Hellestrand, Proceedings of ISCAS 2001. The IEEE International Symposium on Circuits and Systems, Sydney, (546-549). 6-9 May, 2001. 99  
Tseng, I-Lun and Postula, Adam (2004). A Layout-Aware Circuit Sizing Model Using Parametric Analysis. In: Y. Takeuchi, Proceedings of the Workshop on Synthesis and System Integration of Mixed Information Technologies. The 12th Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI'04), Kanazawa, Japan, (235-240). 18-19 October, 2004. 1642 326
Hsu, C. T., Lau, M. P., Yeow, T. Y. T. and Yao, Z. Q. (2000). Analysis of hot-carrier-induced degradation in MOSFET's by gate-to-drain and gate-to-substrate capacitance measurements. In: W R Tonti, 2000 IEEE International Reliability Physics Symposium Proceedings 38th Annual. 38th Annual International Reliability Physics Symposium, San Jose, (98-102). 10-13 April 2000. 51  
Hsu, C. T., Lau, M. M. and Yeow, Y. T. (2001) Analysis of the gate capacitance measurement technique and its application for the evaluation of hot-carrier degradation in submicrometer MOSFETs. Microelectronics Reliability, 41 2: 201-209. doi:10.1016/S0026-2714(00)00222-5 82   5 Cited 5 times in Scopus5 0
Tseng, I-Lun and Postula, Adam (2006). An efficient algorithm for partitioning parameterized polygons into rectangles. In: Z. Yan, Proceedings of the 2006 ACM Great Lakes Symposium on VLSI. 2006 ACM Great Lakes Symposium on VLSI (GLSVLSI), Philadelphia, U.S.A., (366-371). 30 April - 2 May, 2006. doi:10.1145/1127908.1127992 158   Cited 5 times in Scopus5 0
Lau, M. M., Chiang, C. Y. T., Yeow, Y. T. and Yao, Z. Q. (2001) A new method of threshold voltage extraction via MOSFET gate-to-substrate capacitance measurement. Ieee Transactions On Electron Devices, 48 8: 1742-1744. doi:10.1109/16.936698 123   6 Cited 7 times in Scopus7 0
Rajagopalan, K. and Sutton, P. R. (2001). An FPGA architecture with configurable multiplier and carry units for improved arithmetic performance. In: Proceedings of FPGA '01. Ninth International Symposium on Field Programmable Gate Arras, Monterey, California, (225-225). 11-13 February, 2001. 113  
Thanigaivelan, B., Postula, A J and Yong, D (2006). A self-validated computation approach to symbolic analysis of analog integrated circuits. In: S. Manetti, SMACD'06 9th International Workshop on Symbolic Methods and Applications to Circuit Design, Proceedings. SMACD'06 Symbolic Methods and Applications to Circuit Design, Firenze, Italy, (1-6). 12-13 October, 2006. 86  
Gu, Linglei. (2002). Automatic analog interface circuit design Master's Thesis, School of Computer Science and Electrical Engineering, The University of Queensland. 115  
Kong, FCJ, Yeow, YT and Domyo, H (2003) Characteristics of small-signal capacitances of silicon-on-sapphire MOSFETs. Electronics Letters, 39 4: 407-408. doi:10.1049/el:20030226 32   1 Cited 1 times in Scopus1 0
Sitte, J., Zhang, L. and Rueckert, U (2007) Characterization of Analog Local Cluster Neural Network Hardware for Control. IEEE Transactions on Neural Networks, 18 4: 1242-1253. doi:10.1109/TNN.2007.899518 83   1 Cited 1 times in Scopus1 0
Lau, Mei Po Mabel (2002). Characterization of hot-carrier induced degradation via small-signal characteristics in mosfets PhD Thesis, School of Computer Science and Electrical Engineering, The University of Queensland. 114 2
Hsu, Clement Che Ta. (2002). Characterization of hot-carriers induced degradation in mosfets through gate capacitances measurement at room and cryogenic temperatures PhD Thesis, School of Computer Science and Electrical Engineering, The University of Queensland. 133 4
Kong, Frederick, Lau, Mabe and Yeow, Yew-Tong (1999). Determination of carrier generation lifetime via current transient in MOS capacitor. In: L Faraone, Proceedings of the Conference on Optoelectronic and Microelectronic Materials and Devices. Conference on Optoelectronic and Microelectronic Materials and Devices (COMMAD'98), Perth, WA, (438-441). 14-16 December 1998. doi:10.1109/COMMAD.1998.791683 75   0
Prabhakaran, Pradeep. (2004). Development of electronic instrument for defect measurements with eddy currents MPhil Thesis, School of Information Technology and Electrical Engineering, The University of Queensland. 151 3
Chim, WK, Wong, KM, Teo, YL, Lei, Y and Yeow, YT (2002) Dopant extraction from scanning capacitance microscopy measurements of p-n junctions using combined inverse modeling and forward simulation. Applied Physics Letters, 80 25: 4837-4839. doi:10.1063/1.1487899 46   8 Cited 8 times in Scopus8 0
Hong, Y. D., Yan, J., Wong, K., Yeow, T.Y.T. and Chim, W-K. (2004). Dopant profile extraction by inverse modeling of scanning capacitance microscopy using peak dC/dV. In: R. Huang, M. Yu, J. Liou, T. Hiramoto and C. Claeys, Proceedings of the Seventh International Conference on Solid-State and Integrated Circuits Technology. The Seventh International Conference on Solid-State and Integrated Circuits Technology, Beijing, China, (954-957). 18-21 October, 2004. 52   0
Bergmann, N. W. (2002) Editorial. Microelectronics Journal, 33 12: 1031-1031. doi:10.1016/S0026-2692(02)00107-6 60   0 0
Thanigaivelan, B., Postula, A J and Ding, Y (2006). Efficient simplification strategies for symbolic circuit expressions of linear analog integrated circuits. In: A. J. Hariz, Microelectronics, MEMs and Nanotechnology. Microelectronics, MEMs and Nanotechnology, Brisbane, (1-10). 11-14 December, 2005. 115  
Williams, John A. and Bergmann, Neil W. (2004). Embedded Linux as a Platform for Dynamically Self-Reconfiguring Systems-On-Chip. In: T. Plaks, M. Gokhale, M. Leeser, M. Platzner, G. Smit and M. Wirthlin, Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms. The International Conference on Engineering of Reconfigurable Systems and Algorithms, Las Vegas, Nevada, USA, (163-169). 21-24 June, 2004. 5396 3010 2
Tseng, I-Lun (2008). Estimation of Analog Layout Parasitics with Parameterized Polygons PhD Thesis, School of Information Technology and Electrical Engineering, The University of Queensland. 489 96
Yang, J., Kopanski, J. J., Postula, A. and Bialkowski, M. (2005) Experimental investigation of interface states and photovoltaic effects on the scanning capacitance microscopy measurement for p-n junction dopant profiling. Applied Physics Letters, 86 18: 182101-1-182101-3. doi:10.1063/1.1922077 217   4 Cited 3 times in Scopus3 0
Yeow, T.Y.T. and Kong, F. C. J. (2001) Extraction of MOSFET threshold voltage, series resistance, effective channel length, and inversion layer mobility from small-signal channel conductance measurement. IEEE Transactions on Electron Devices, 48 12: 2870-2874. doi:10.1109/16.974720 571   12 Cited 15 times in Scopus15 0
Tseng, I-Lun and Postula, Adam (2004). GBLD: A Formal Model for Layout Description and Generation. In: P. Boulet, Proccedings of the Forum on Specification and Design Languages. The Forum on Specification and Design Languages, Lille, France, (660-670). 14-17 September, 2004. 1641 501
Bergmann, N. W. (2001). Interfacing requirements for MEMS components in system-on-chip methodologies. In: N. Bergmann, Proceedings of SPIE: Electronics and Structures for MEMS II. SPIE's International Symposium on Microelectronics and Micro-Electro-Mechanical Systems, Adelaide, (45-50). 17-19 December, 2001. doi:10.1117/12.449173 77   0 0
Chiang, Y., Yeow, T. Y. T. and Ghodsi, R. (2000) Inverse modeling of 2-dimensional MOSFET dopant profile vias capacitance of the source/drain gated diode. IEEE Transactions on Electron Devices, 47 7: 1385-1392. doi:10.1109/16.848281 43   7 Cited 10 times in Scopus10 0
Lau, M. P., Hsu, C. T. and Yeow, T.Y.T. (2001). Investigations of hot-carrier induced interface damages via small-signal characteristics of drain-to-substrate gated-diode. In: W. Tan, K, Pey, W. Chim and J. Thong, Proceedings of the 2001 Eighth International Symposium on the Physical and Failure Analysis of Integrated Circuits. Eighth International Symposium on the Physical and Failure Analysis of Integrated Circuits, Singapore, (249-253). 9-13 July, 2001. doi:10.1109/IPFA.2001.941496 56   3 0
Yang, J. and Yeow, T.Y.T. (2001). Modeling study of scanning capacitance microscopy measurement for P-N junction dopant profile extraction. In: B. Li, G. Ru, X. Qu, P. Yu and H. Iwai, 2002 Sixth International Conference on Solid-State and Integrated Circuit Technology Proceedings. Sixth International Conference on Solid-State and Integrated Circuit Technology, Shanghai, (1043-1046). 22-25 October, 2001. 89   0
Yip, A., Yeow, T. Y. T., Samudra, G. S. and Ling, C. H. (2000). Modelling of the gated-diode configuration in bulk mosfet's. In: M. Laudon and B. Romanowicz, 2000 International Conference on Modeling and Simulation of Microsystems: MSM 2000. MSM 2000, San Diego, CA USA, (360-363). 27-29 March 2000. 79  
Bertling, K., Rakic, A.D. and Yeow, Y.T. (2007). Numerical modelling study of the sensitivity of SOS MOSFET characteristics to silicon film thickness and back surface trapped charge variation. In: Faraone, L., Betts, S., Dell, J., Musca, C., Nener, B., Parish, G. and Wehner, J., COMMAD 2006: Proceedings of the 2006 Conference on Optoelectronic and Microelectronic Materials and Devices. 2006 Conference on Optoelectronic and Microelectronic Materials and Devices (COMMAD 2006), Perth, WA, (283-285). 6-8 December, 2006. doi:10.1109/COMMAD.2006.4429937 78   0 Cited 0 times in Scopus0 0
Lee, Andy S. and Bergmann, Neil W. (2003). On-Chip Communication Architectures for Reconfigurable System-on-Chip. In: K. Asada and M. Fujita, Proceedings. 2003 IEEE International Conference on Field-Programmable Technology (FPT). 2003 IEEE International Conference on Field-Programmable Technology (FPT), The University of Tokyo, Tokyo, Japan, (332-335). 15-17 December 2003. doi:10.1109/FPT.2003.1275770 2407 2555 0 0
Proceedings of SPIE: Electronics and Structures for MEMS II (2001) . Edited by N. W. Bergmann. SPIE's International Symposium on Microelectronics and Micro-Electro-Mechanical Systems, 17-19 December, 2001, Adelaide. 65  
Shukla, Sunil, Bergmann, Neil W. and Becker, Jürgen (2006). QUKU: A Fast Run Time Reconfigurable Platform for Image Edge Detection. In: K. Bertels, J. M. P. Cardoso and S. Vassiliadis, Lecture Notes in Computer Science: Reconfigurable Computing: Architectures and Applications. Second International Workshop, ARC 2006, Revised Selected Papers, Delft, The Netherlands, (93-98). 1-3 March 2006. doi:10.1007/11802839_13 958 856 5 Cited 6 times in Scopus6 0
Kong, Frederick. (2003). Silicon-on-sapphire MOSFET parameter extraction by small-signal measurement PhD Thesis, School of Information Technology and Electrical Engineering, The University of Queensland. 222 117
Shukla, Sunil and Bergmann, Neil (2004). Single Bit Error Correction Implementation in CRC-16 on FPGA. In: O. Diessel and J. Williams, International Conference on Field Programmable Technology, Brisbane, Australia, (319-322). 6-8 December, 2004. 2913 4350
Han, Tony. (2002). SWASAD Smith & Waterman-algorithm-specific ASIC design MPhil Thesis, School of Computer Science and Electrical Engineering, The University of Queensland. 158 2
Tseng, I., Postula, A. J. and Jozwiak, L. (2005). Symbolic Extraction for Estimating Analog Layout Parasitics in Layout-Aware Synthesis. In: Andrzej Napieralski, Proceedings of the 12th International Conference Mixed Design of Integrated Circuits and Systems (MIXDES 2005). The 12th International Conference on Mixed Design of Integrated Circuits and Systems (MIXDES'05), Krakow, Poland, (195-199). 22-25 June, 2005. 1245 708
Hemani, Ahmed, Deb, Abhijit Kumar, Oberg, Johnny, Postula, Adam, Lindqvist, Dan and Fjellborg, Bjorn (2000) System Level Virtual Prototyping of DSP SOCs Using Grammar Based Approach. Design Automation for Embedded System, 5 3-4: 295-311. doi:10.1023/A:1008906302979 36   11 0
Bergmann, Neil W. and Williams, John A. (2003). The Egret Platform For Reconfigurable System-On-Chip Proceedings. 2003 IEEE International Conference on Field-Programmable Technology (FPT), 2003.. In: K. Asada and M. Fujita, Proceedings. 2003 IEEE International Conference on Field-Programmable Technology (FPT), 2003.. 2003 IEEE International Conference on Field-Programmable Technology (FPT), Tokyo, Japan, (340-343). 15-17 December, 2003. doi:10.1109/FPT.2003.1275772 2090 1105 0
Chiang, Y., Yeow, T. Y. T. and Ghodsi, R. (2000). Two dimensional mosfet dopant profile by inverse modelling via source/drain-to-substrate capacitance measurement. In: M. Laudon and B. Romanowicz, 2000 International Conference on Modeling and Simulation of Microsystems: MSM 2000. MSM 2000, San Diego, CA USA, (368-371). 27-29 March 2000. 46