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Rajagopalan, K. and Sutton, P. R. (2001). A flexible multiplacation unit for an FPGA logic block. In: D. Skellern and G. Hellestrand, Proceedings of ISCAS 2001. The IEEE International Symposium on Circuits and Systems, Sydney, (546-549). 6-9 May, 2001. 100  
Rajagopalan, K. and Sutton, P. R. (2001). An FPGA architecture with configurable multiplier and carry units for improved arithmetic performance. In: Proceedings of FPGA '01. Ninth International Symposium on Field Programmable Gate Arras, Monterey, California, (225-225). 11-13 February, 2001. 115